英语翻译自己翻译的要发疯了.千万别给金山译的.分都给你The devices include an on-chip 8k

英语翻译
自己翻译的要发疯了.千万别给金山译的.分都给你
The devices include an on-chip 8k byte RAM block and an external memory interface (EMIF) for accessing
off-chip data memory.The on-chip 8k byte block can be addressed over the entire 64k external data memory
address range (overlapping 8k boundaries).External data memory address space can be mapped to
on-chip memory only,off-chip memory only,or a combination of the two (addresses up to 8k directed to onchip,
above 8k directed to EMIF).The EMIF is also configurable for multiplexed or non-multiplexed
address/data lines.
On the C8051F12x and C8051F130/1,the MCU’s program memory consists of 128 k bytes of banked
Flash memory.The 1024 bytes from addresses 0x1FC00 to 0x1FFFF are reserved.On the C8051F132/3,
the MCU’s program memory consists of 64 k bytes of Flash memory.This memory may be reprogrammed
in-system in 1024 byte sectors,and requires no special off-chip programming voltage.
On all devices,there are also two 128 byte sectors at addresses 0x20000 to 0x200FF,which may be used
by software for data storage.See Figure 1.8 for the MCU system memory map.
1.3.JTAG Debug and Boundary Scan
JTAG boundary scan and debug circuitry is included which provides non-intrusive,full speed,in-circuit
debugging using the production part installed in the end application,via the four-pin JTAG interface.The
JTAG port is fully compliant to IEEE 1149.1,providing full boundary scan for test and manufacturing purposes.
Silicon Labs' debugging system supports inspection and modification of memory and registers,breakpoints,
watchpoints,a stack monitor,and single stepping.No additional target RAM,program memory,timers,
or communications channels are required.All the digital and analog peripherals are functional and
work correctly while debugging.All the peripherals (except for the ADC and SMBus) are stalled when the
MCU is halted,during single stepping,or at a breakpoint in order to keep them synchronized.
The C8051F120DK development kit provides all the hardware and software necessary to develop application
code and perform in-circuit debugging with the C8051F12x or C8051F13x MCUs.
The kit includes a Windows (95 or later) development environment,a serial adapter for connecting to the
JTAG port,and a target application board with a C8051F120 MCU installed.All of the necessary communication
cables and a wall-mount power supply are also supplied with the development kit.Silicon Labs’
debug environment is a vastly superior configuration for developing and debugging embedded applications
compared to standard MCU emulators,which use on-board "ICE Chips" and target cables and require the
MCU in the application board to be socketed.Silicon Labs' debug environment both increases ease of use
and preserves the performance of the precision,on-chip analog peripherals.

该装置包括一个片上为8K字节的RAM块和一个外部存储器接口（ emif ）进入
小康芯片数据存储器.该单晶片为8K字节块可以解决在整个第64 K外部数据存储器
地址范围（重叠为8K的界限） .外部数据存储器地址空间可以映射到
采用片上存储器只,场外晶片记忆体,或两者的结合（地址,最多为8K指示onchip ,
以上为8K指示emif ） .该emif也可配置为复用或非复用
地址/数据线.
关于c8051f12x和c8051f130 /一日起,在单片机的程序存储器的128 k字节库
快闪记忆体.在1024字节,从地址0x1fc00到0x1ffff均予以保留.关于c8051f132 / 3
该单片机的程序存储器的64 k字节的快闪记忆体.这记忆,可重组成
在系统1024字节部门,并不需要特别的小康芯片编程电压.
对所有设备,也有两个128字节部门地址0x20000以0x200ff ,它可用于
通过软件,为数据存储.见图1.8 ,为单片机系统中的内存映射.
1.3 . JTAG调试和边界扫描
JTAG边界扫描和调试电路,其中包括提供非侵入性,全速,在电路
调试使用的生产部分安装在终端应用,途经四个引脚JTAG界面.该
JTAG端口,它完全符合的IEEE 1149.1 ,提供全面的边界扫描测试和制造的目的.
Silicon Labs的调试系统支持检查和修改内存和寄存器,断点,
watchpoints ,一叠显示器,并单步.没有额外目标的RAM ,程序存储器,定时器,
或通信渠道.所有的数字和模拟外围设备的功能和
工作的同时,正确调试.所有周边设备（除香港艺术发展局和SMBus ）是停滞的时候
MCU是停产后,在单步,或在断点为了保持对它们的同步.
该c8051f120dk开发套件提供了所有的硬件和软件,并要发展应用
代码和履行在电路调试与c8051f12x或c8051f13x微控制器.
该套件包括一个Windows （ 95或以上版本）的开发环境,一个串行适配器用于连接到
JTAG端口,和一个目标应用板与c8051f120单片机安装.一切必要的沟通
电缆和一个壁挂式电源供应,也提供了开发工具包.利用Silicon Labs
调试环境是一个很大的优势配置,为开发和调试嵌入式应用
相比标准单片机仿真器,它利用机载"冰晶片" ,并针对电缆,并要求该
单片机在应用委员会,以嵌.利用Silicon Labs调试环境不但增加易用性
并保留了高性能的精度,片上模拟外设.